LF48212 Overview
The LF48212 is a high-speed video alpha mixer capable of mixing video signals at real-time video rates. It takes two 12-bit video signals and mixes them together using an alpha mix factor. Alpha determines the weighting that each video signal receives during the mix operation.
LF48212 Key Features
- 68-pin PLCC, J-Lead
- 64-pin PQFP
- Master Clock The rising edge of CLK strobes all enabled registers except for the Delay Control Register. Inputs DINA11-0
- Pixel Data Input A DINA11-0 is one of the 12-bit registered data input ports. Data is latched on the rising edge of CLK.
- Pixel Data Input B DINB11-0 is the other 12-bit registered data input port. Data is latched on the rising edge of CLK
- Data Output DOUT12-0 is the 13-bit registered data output port. Controls TC
- Data Format Control TC determines if the input data is in unsigned or two’s plement format. If TC is LOW, the data is in
- Alpha Mix Input Enable When HIGH, data on α11-0 is latched into the LF48212 on the rising edge of CLK. When LOW, data on
- Load Strobe The rising edge of LD latches the data on DEL into the Delay Control Register. BYPASS
- Bypass Delay Stage Control The BYPASS control is used to bypass the internal programmable delay stages. When BYPASS is s